TM 11-7025-221-20
1-17. Demultiplexer Section Block Diagram Discussion (V3/V4 Models).
A frame sync detector circuit on SSV card A2 is time shared by each active demux card. This
circuit sequentially monitors each incoming SG for a 20-bit sync word. When the sync word is
found, a frame sync (FS) signal is applied to the demux card supplying the SG. This allows the
demux card to start operating at the proper time. Thereafter, each demux card performs a sync
maintenance function to ensure that it is still in sync. If sync is lost, the demux card is turned
off and the frame sync detector would again attempt to acquire sync.
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